{
  "docId": "019dd923-5e88-73ef-bd5d-d76a2779de1a",
  "docSlug": "0251578dbff75a2b",
  "documentTitle": "2025 The AI Dossier",
  "authorId": "Deloitte",
  "authorName": "Deloitte",
  "documentKindSlug": "consulting-deck",
  "documentKindLabel": "Consulting deck",
  "sourceTypeSlug": "strategy_consulting",
  "sourceTypeLabel": "Strategy consulting",
  "presentationDate": null,
  "orientation": "landscape",
  "aspectRatio": 1.778,
  "pageNumber": 177,
  "pageCount": 190,
  "prevPage": 176,
  "nextPage": 178,
  "slideType": "problem_statement",
  "function": "frame_problem",
  "density": "dense",
  "nDataPoints": 0,
  "notes": "The slide uses a 'How AI Can Help' callout box to explain the technical application of AI in chip design.",
  "elementsJson": [
    "headline_text",
    "paragraph",
    "callout_box",
    "icon_grid"
  ],
  "metadataConfidence": 1,
  "imagePath": null,
  "slideHref": "/slides/019dd923-5e88-73ef-bd5d-d76a2779de1a/177",
  "deckHref": "/decks/019dd923-5e88-73ef-bd5d-d76a2779de1a",
  "deckJsonHref": "/decks/019dd923-5e88-73ef-bd5d-d76a2779de1a.json",
  "deckAnchorHref": "/decks/019dd923-5e88-73ef-bd5d-d76a2779de1a#slide-177",
  "components": [
    {
      "bbox": {
        "h": 0.15,
        "w": 0.25,
        "x": 0.07,
        "y": 0.35
      },
      "kind": "callout",
      "text": "ISSUE/OPPORTUNITY: With demand for ever more powerful semiconductor chips, design complexity is rising. As semiconductor sizes continue to shrink, density scaling becomes a challenge, since upgraded features are required to fit on perpetually smaller chips.",
      "attrs": null,
      "subkind": "primary",
      "toolName": null,
      "toolSlug": null,
      "confidence": null,
      "componentId": "9b5376bb-642f-4caf-be75-050602130bac",
      "frameworkName": null,
      "frameworkSlug": null
    },
    {
      "bbox": {
        "h": 0.7,
        "w": 0.35,
        "x": 0.54,
        "y": 0.15
      },
      "kind": "callout",
      "text": "HOW AI CAN HELP: Iterative chip design. AI can generate and iterate chip designs and improve the outputs by having chip designs “compete” across a set of performance dimensions. At each new iteration, chip parameters are tweaked based on learnings from the best-performing designs in past iterations. These models are trained on existing layouts to learn patterns and constraints and generate new layouts that meet specific design requirements.",
      "attrs": null,
      "subkind": "primary",
      "toolName": null,
      "toolSlug": null,
      "confidence": null,
      "componentId": "ca644f2a-dcc1-49b7-ac08-92e6f373824d",
      "frameworkName": null,
      "frameworkSlug": null
    },
    {
      "bbox": null,
      "kind": "callout",
      "text": "AI can generate and iterate chip designs and improve the outputs by having chip designs “compete” across a set of performance dimensions.",
      "attrs": null,
      "subkind": null,
      "toolName": "Visual emphasis",
      "toolSlug": "visual-emphasis",
      "confidence": null,
      "componentId": "019dd952-5643-744f-8947-293909d18fcc",
      "frameworkName": null,
      "frameworkSlug": null
    },
    {
      "bbox": {
        "h": 0.02,
        "w": 0.3,
        "x": 0.07,
        "y": 0.22
      },
      "kind": "paragraph",
      "text": "Semiconductor chip design & manufacturing",
      "attrs": null,
      "subkind": "paragraph",
      "toolName": null,
      "toolSlug": null,
      "confidence": null,
      "componentId": "b13be5d6-56de-4a64-a7f7-b9f7a8d26db3",
      "frameworkName": null,
      "frameworkSlug": null
    },
    {
      "bbox": {
        "h": 0.05,
        "w": 0.4,
        "x": 0.07,
        "y": 0.27
      },
      "kind": "paragraph",
      "text": "AI can be used to iterate chip designs by having designs “compete” across a set of performance dimensions.",
      "attrs": null,
      "subkind": "paragraph",
      "toolName": null,
      "toolSlug": null,
      "confidence": null,
      "componentId": "d1eb8188-e29a-436a-a129-07770e3b0b39",
      "frameworkName": null,
      "frameworkSlug": null
    },
    {
      "bbox": {
        "h": 0.04,
        "w": 0.15,
        "x": 0.08,
        "y": 0.89
      },
      "kind": "source-note",
      "text": "R&D/Product Development",
      "attrs": null,
      "subkind": null,
      "toolName": null,
      "toolSlug": null,
      "confidence": null,
      "componentId": "379fa504-0d15-4c2b-8d01-5705a9acd992",
      "frameworkName": null,
      "frameworkSlug": null
    },
    {
      "bbox": {
        "h": 0.05,
        "w": 0.4,
        "x": 0.07,
        "y": 0.14
      },
      "kind": "title",
      "text": "Enhancing chip innovation",
      "attrs": null,
      "subkind": "headline",
      "toolName": null,
      "toolSlug": null,
      "confidence": null,
      "componentId": "446027a8-f41e-4863-8673-b7b4f61331fa",
      "frameworkName": null,
      "frameworkSlug": null
    }
  ],
  "metrics": [],
  "tools": [],
  "frameworks": [],
  "arcBeats": [],
  "loops": [],
  "imagePathAlt": null,
  "thumbSrc": null,
  "thumbSrcAlt": null,
  "locked": true
}